1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device implementing in-plane switching (IPS) where an electric field to be applied to liquid crystal is generated in a plane parallel to a substrate.
2. Discussion of the Related Art
Recently, liquid crystal display (LCD) devices with light, thin, and low power consumption characteristics are used in office automation equipment and video units and the like. Driving methods for such LCDs typically include a twisted nematic (TN) mode and a super twisted nematic (STN) mode. Although TN-LCDs and STN-LCDs have been put to practical use, they have a drawback in that they have a very narrow viewing angle. In order to solve the problem of narrow viewing angle, IPS-LCD devices have been proposed. IPS-LCD devices typically include a lower substrate where a pixel electrode and a common electrode are disposed, an upper substrate having no electrode, and a liquid crystal interposed between the upper and lower substrates.
FIG. 1 is a cross-sectional view illustrating a conventional TN-LCD panel. As shown in FIG. 1, the liquid crystal display panel has lower and upper substrates 1a and 1b with a liquid crystal layer (“LC”) interposed between the lower and upper substrates 1a and 1b. The lower substrate 1a has a thin film transistor (“TFT”) as a switching element for changing orientation of the LC molecules. The TFT includes a pixel electrode 15 to apply a voltage to the LC layer according to signals from the TFT. The upper substrate 1b has a color filter 25 for implementing colors. There is a common electrode 14 on the color filter 25. The common electrode 14 serves as an electrode for applying a voltage to the LC layer. The pixel electrode 15 is arranged over a pixel portion “P”, i.e., a display area. Further, to prevent leakage of the liquid crystal injected into the space between the two substrates 1a and 1b, the two substrates 1a and 1b are sealed by a sealant 6.
As described above, because the pixel and common electrodes 15 and 14 of the conventional TN-LCD panel are positioned on the lower and upper substrates 1a and 1b, respectively, the electric field induced therebetween is perpendicular to the lower and upper substrates 1a and 1b. Therefore, unlike the TN or STN-LCD panel, the IPS-LCD panel implements an electric field parallel to the substrates. A detailed explanation about operation modes of a typical IPS-LCD panel will be provided referring to FIGS. 2 to 6.
As shown in FIG. 2, lower and upper substrates 1a and 1b are spaced apart from each other, and a liquid crystal is interposed therebetween. The lower and upper substrates are called array and color filter substrates, respectively. Pixel and common electrodes 15 and 14 are disposed on the lower substrate 1a. The pixel and common electrodes 15 and 14 are parallel with and spaced apart from each other. A color filter 25 is disposed on a surface of the upper substrate 1b and opposes the lower substrate 1a. The pixel and common electrodes 15 and 14 apply an electric field “E” to the liquid crystal. The liquid crystal has a negative dielectric anisotropy, and thus it is aligned parallel with the electric field “E”.
FIGS. 3 to 6 conceptually illustrate operation modes of a conventional IPS-LCD device. When there is no electric field between the pixel and the common electrodes 15 and 14, the long axes of the liquid crystal molecules maintain an angle from a line perpendicular to the parallel pixel and common electrodes 15 and 14. Herein, the angle is 45 degrees, for example.
On the contrary, when there is an electric field between the pixel and common electrodes 15 and 14, there is an in-plane electric field “E” parallel to the surface of the lower substrate 1a between the pixel and common electrodes 15 and 14. The in-plane electric field “E” is parallel to the surface of the lower substrate 1a because the pixel and common electrodes are formed on the lower substrate 1a. Accordingly, the liquid crystal molecules are twisted so as to align the long axes thereof with the direction of the electric field, thereby the liquid crystal molecules are aligned such that the long axes thereof are parallel with the line perpendicular to the pixel and common electrodes 15 and 14.
By the above-mentioned operation modes and with additional parts such as polarizers and alignment layers, the IPS-LCD device displays images. The IPS-LCD device has wide viewing angle and low color dispersion. The fabricating processes of this IPS-LCD device are simpler that other various LCD devices. But, because the pixel and common electrodes are disposed on the same plane of the lower substrate, the transmittance and aperture ratio are low.
For the sake of discussing the above-mentioned problem of the IPS-LCD device in detail, with reference to FIGS. 7A and 7B, the basic structure of the IPS-LCD device will be described in detail.
FIG. 7A is a plan view illustrating in detail the structure of one pixel region in the IPS-LCD device, specifically, a unit pixel region 10. In addition, a cross-sectional view taken along a line “B-B” in FIG. 7A is illustrated in FIG. 7B.
On the surface of the transparent substrate 1A adjacent to the liquid crystal layer, a scan signal line 2 made of, for example, aluminum (Al) is formed extending along the x-direction, as shown in FIG. 7A. In addition, a reference signal line 4, also known as a common line, is formed extending along the x-direction, close to the scan signal line 2 on the +y-direction side thereof. The reference signal line 4 is also made of, for example, Al. A region surrounded by the scan signal line 2, the reference signal line 4, and the video signal lines 3 constitutes a pixel region 10, as previously described.
In addition, the pixel region 10 includes a reference electrode 14 formed by the reference signal line 4, and another reference electrode 14 formed adjacent to the scan signal line 2. The pair of horizontally extending reference electrodes 14 are positioned adjacent to one of a pair of video signal line 3 (on the right side of the figure), and are electrically connected to each other through a conductive layer 14A which is formed simultaneously with the reference electrodes 14.
In the structure described above, the reference electrodes 14 form a pair extending in the direction parallel to the scan signal line 2. Stated another way, the reference electrodes form a strip extending in a direction perpendicular to the video signal lines 3, later described.
A first insulating film 11 (see FIG. 7B) made of, for example, silicon nitride is formed on the surface of the lower substrate 1A on which the scan signal lines 2 are formed, overlying the scan signal line 2, the reference signal lines 4, and the reference electrodes 14. The first insulating film 11 functions as (i) an inter-layer insulating film for insulating the scan signal line 2 and the reference signal line 4 from the video signal lines 3, (ii) as a gate-insulating layer for a region in which a thin film transistor (TFT) is formed, and (iii) as a dielectric film for a region in which a capacitor Cstg is formed. The TFT includes a drain electrode 3A and a source electrode 15A. A semiconductor layer 12 for the TFT is formed near a cross point of the gate and data lines 2 and 3. A first polarization layer 18 is formed on the other surface of the lower substrate 1A.
On the first insulating film 11, a display electrode 15 is formed parallel with the reference electrode 14. One end portion of the display electrode 15 is electrically connected with the conductive layer 14A, and the other end portion thereof is electrically connected with the source electrode 15A. Still on the first insulating film 11, a first planar film 16 is formed to cover the display electrode 15. A first alignment film 17 is formed on the first planar film 16.
FIG. 7B illustrates a cross-sectional view of the upper substrate 1B on which a black matrix 300 is formed. A color filter 25 is formed to close an opening in the black matrix 300. Then, a second planar film 27 is formed to cover the color filter 25 and the black matrix 300. A second alignment layer 28 is formed on the surface of the second planar film 27 facing the liquid crystal layer.
The color filter 25 is formed to define three sub-pixel regions adjacent to and extending along the video signal line 3 and to position a red (R) filter, a green (G) filter, and a blue (B) filter, for example, from the top of the three sub-pixel regions. The three sub-pixel regions constitute one pixel region for color display.
A second polarization layer 29 is also arranged on the surface of the upper substrate 1B that is opposite to the surface of the upper substrate 1B adjacent to the liquid crystal layer, on which various films are formed as described above.
It will be understood that in FIG. 7B, a voltage applied between the reference electrodes 14 and the display electrode 15 causes an electric field E to be generated in the liquid crystal layer LC in parallel with the respective surfaces of the lower and upper substrates 1A, 1B. This is why the illustrated structure is referred to as the in plane switching, as mentioned above.
To improve the aperture ratio, the distance between the reference and display electrodes 14 and 15 should be enlarged. In that case, a driving voltage to induce the electric field between the reference and display electrodes 14 and 15 must be increased to maintain a normal display.
Further, since the low aperture ratio results in a low brightness quality of the liquid crystal display device, the incident light from the back-light device must be brighter to compensate, which increases power consumption of the liquid crystal display device.
FIG. 8 shows an array substrate of another conventional IPS-LCD device.
As shown in FIG. 8, gate and common lines 50 and 54 are arranged transversely and parallel with each other. A data line 60 is arranged perpendicular to the gate and common lines 50 and 54. Gate electrode 52 and source electrode 62 are positioned near a cross point of the gate and data lines 50 and 60, and communicate with the gate line 50 and the data line 60, respectively. Herein, the source electrode 62 overlaps a portion of the gate electrode 52.
A plurality of common electrodes 54a are positioned spaced apart and perpendicular to the common line 54. The common electrodes 54a communicate with the common line 54. A first connecting line 66 communicates with the drain electrode 64, and a plurality of pixel electrodes 66a are positioned perpendicular to the first connecting line 66. First ends of the pixel electrodes 66a communicate with the first connecting line 66, and the second ends of pixel electrodes 66a communicate with a second connecting line 68 that is positioned over the common line 54. Accordingly, the common electrodes 54a and the pixel electrodes 66a are parallel with and spaced apart from each other in an alternating pattern.
Similarly to the array substrate of FIG. 7A, since the pixel and common electrodes 66a and 54a are formed on the same substrate, the aperture ratio is reduced. That is to say, the opaque pixel and common electrodes prevent incident light produced by a back light (not shown) from passing through pixel areas covered by the pixel and common electrodes. If distances between the common and pixel electrodes are enlarged to improve the aperture ratios, much stronger driving voltage must be generated between the electrodes to compensate for the loss of the electric fields due to the greater distance therebetween.
In addition, the intensity of the back light must be increased to compensate for the loss of the back light due to the decrease in the aperture ratios. Therefore, power consumption will be increased.